半導体集積装置

Abstract

PURPOSE:To reduce the influence of variation in component precision due to the stress in manufacturing and assembling a semiconductor, by dividing resistor elements in an element and forming each divided element in different places on a semiconductor chip and connecting each divided element every element before dividing with wirings. CONSTITUTION:In a semiconductor substrate (chip) 1, a digital-to-analog conversion circuit 2 (D/A conversion circuit) of R-2R ladder resistor network type used as an electronic circuit is formed on the chip 1. All or a part of the resistor elements of a constant current circuit included in current switch parts 9 to 12 of the D/A converter 2 are divided into a plurality of elements. Particularly, the resistor elements or capacitor elements in a circuit element are divided into a plurality of the elements, and each divided element R4A to R8A and R4B are formed in different places on the semiconductor chip 1. Further, each divided element R4A to R8A and R4B to R8B to R8B are connected each other with wirings L4 to L8 for each element before the division. Thus, the influence of variation in component precision can be reduced.
(57)【要約】 【目的】複数の電子回路を混載する半導体集積回路にお いて、半導体製造時の素子バラツキと組立工程時の応力 による部品精度のバラツキの影響を少なくすることを目 的とする。 【構成】電子回路を構成する各要素を共通の半導体チッ プ上に形成する半導体集積装置において、前記要素中の 抵抗素子または容量素子を複数個に分割し、それぞれの 分割素子を前記半導体チップ上の異なる位置に形成する と共に、各分割素子の間を分割前の素子ごとに配線で結 ぶことを特徴とする。

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Patent Citations (7)

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Cited By (1)

    Publication numberPublication dateAssigneeTitle
    JP-2007158166-AJune 21, 2007Nec Electronics Corp, Necエレクトロニクス株式会社電流源セル配置構造およびda変換器